活动简介

The VTS Program Committee invites original, unpublished paper submissions for VTS 2017. Paper submissions should be complete manuscripts, up to six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status. On the title page, please include: author name(s) and affiliation(s), and the mailing address, phone number, and e-mail address of the contact author. A 50-word abstract and five keywords identifying the topic area are also required.

征稿信息

重要日期

2016-10-14
初稿截稿日期
2016-12-20
初稿录用日期

征稿范围

  • Analog/Mixed-Signal/RF Test 
  • ATPG & Compression
  • ATE Architecture & Software
  • Automotive Test & Safety
  • Built-In Self-Test (BIST)
  • Defect & Current Based Test
  • Defect/Fault Tolerance
  • Delay & Performance Test
  • Design for Testability (DFT)
  • Design Verification/Validation
  • Embedded System & Board Test
  • Embedded Test Methods
  • Emerging Technologies Test
  • FPGA Test
  • Fault Modeling and Simulation
  • Hardware Security
  • Low-Power IC Test
  • Microsystems/MEMS/Sensors Test
  • Memory Test and Repair
  • On-Line Test & Error Correction
  • Power/Thermal Issues in Test
  • System-on-Chip (SOC) Test
  • Test Standards
  • Test Economics
  • Test of Biomedical Devices
  • Test of High-Speed I/O
  • Test Quality and Reliability
  • Test Resource Partitioning
  • Transients and Soft Errors
  • 2.5D, 3D and SiP Test
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重要日期
  • 会议日期

    04月09日

    2017

    04月12日

    2017

  • 10月14日 2016

    初稿截稿日期

  • 12月20日 2016

    初稿录用通知日期

  • 04月12日 2017

    注册截止日期

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