活动简介

The VTS Program Committee invites original, unpublished paper submissions for VTS 2019. Proposals for the innovative practices and special sessions tracks are also invited.

Paper submissions should be complete manuscripts, up to six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status. On the title page, please include: author name(s) and affiliation(s), and the mailing address, phone number, and e-mail address of the contact author. A 50-word abstract and five keywords identifying the topic area are also required.

组委会

General Chair
Chen-Huan Chiang
Intel Inc.
Email: chen-huan.chiang@intel.com
Program Chairs
Peilin Song
IBM Research
Email: psong@us.ibm.com

Stefano Di Carlo
Politecnico di Torino
Email: stefano.dicarlo@polito.it

征稿信息

重要日期

2018-10-05
初稿截稿日期

征稿范围

  • Analog/Mixed-Signal/RF Test
  • ATPG & Compression
  • Silicon Debug
  • Automotive Test & Safety
  • Built-In Self-Test (BIST)
  • Defect & Current Based Test
  • Defect/Fault Tolerance
  • Delay & Performance Test
  • Design for Testability (DFT)
  • Design Verification/Validation
  • Embedded System & Board Test
  • Embedded Test Methods
  • Emerging Technologies Test
  • FPGA Test
  • Fault Modeling and Simulation
  • Hardware Security
  • Low-Power IC Test
  • Microsystems/MEMS/Sensors Test
  • Memory Test and Repair
  • On-Line Test & Error Correction
  • Power/Thermal Issues in Test
  • System-on-Chip (SOC) Test
  • Test Standards
  • Test Economics
  • Test of Biomedical Devices
  • Test of High-Speed I/O
  • Test Quality and Reliability
  • Test Resource Partitioning
  • Transients and Soft Errors
  • 2.5D, 3D and SiP Test
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重要日期
  • 会议日期

    04月23日

    2019

    04月25日

    2019

  • 10月05日 2018

    初稿截稿日期

  • 04月25日 2019

    注册截止日期

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