AMSER-FF: Area-Minimized Soft-Error-Recoverable Flip-Flop for Radiation Hardening
编号:72 访问权限:仅限参会人 更新:2021-08-23 14:23:03 浏览:328次 口头报告

报告开始:2021年08月20日 22:05(Asia/Shanghai)

报告时间:20min

所在会场:[SS] Special Session [SS4] A6. Test Methods Towards Zero Failure Rate for Safety-Critical ICs

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摘要
Among various radiation hardening by designs (RHBD), triple-modular redundancy (TMR) is
frequently used to correct soft errors. One of the wellknown TMR solutions is called ∆TMR, which makes
three copies of flop-flops (FFs) and inserts different delay buffers in front of data inputs of the second
and third FFs for capturing soft errors. However, such solution has shortcomings in the area/power overhead
and the imbalanced rise/fall delay. As a result, a novel TMR flip-flop design called area-minimized soft-errorrecoverable flip-flop (AMSER-FF) is proposed in this paper to reduce the area/power overhead and timing degradation. Each AMSER-FF embeds a reference voltage generator (RVG), which generates balanced rise/fall delay and has fixed area utilization instead
of inserting delay buffers for correcting errors. Experimental results show that AMSER-FF achieves lower
area overhead, power overhead and less timing degradation than ∆TMR.
 
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报告人
Charles H.-P. Wen
Professor National Yang Ming Chiao Tung University

Prof. Hung-Pin (Charles) Wen received the Ph.D. degree in very large-scale integration (VLSI) verification and test from the University of California at Santa Barbara, Santa Barbara, CA, USA, in 2007. He is currently a Distinguished Professor (2020-now) with National Yang Ming Chiao Tung University, Hsinchu, Taiwan, where he is also a specialist in computer engineering. Over the past few years, his research has been focused on applying machine learning and data mining to system-on-chip designs (including radiation hardening, functional verification, and timing analysis) and cloud networking (especially on performance analysis and architecture design of large-scale data centers). Prof. Wen was a recipient of the Best Paper Awards from the 2012 Asia and South Pacific Design Automation Conference (ASP-DAC), the 2014 Synthesis And System Integration of Mixed Information (SASIMI), the 2016 International Conference on Information Networking (ICOIN), the 2017 ICOIN, and the Distinguished Young Scholar Award of the Taiwan IC Design Society.
 

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重要日期
  • 会议日期

    08月18日

    2021

    08月20日

    2021

  • 05月10日 2021

    初稿截稿日期

  • 08月16日 2021

    提前注册日期

  • 08月19日 2021

    报告提交截止日期

  • 08月20日 2021

    注册截止日期

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