In recent years, the development of artificial intelligence (AI) becomes a hot spot. Obviously, in order to realize the application of AI, integrated circuit is an inevitable choice that constitutes the AI system together with software. However, AI algorithms vary in different applications and the algorithms have been continuing to evolve. Meanwhile, AI services are migrating from the cloud to the edge nowadays. Performance demands and power consumption constraints require AI to be deployed on an energy-efficient computing engine.
For a long time, the application specific integrated circuits (ASICs) can achieve the optimization of performance and cost due to their very specified application scenarios. However, in the era of AI, ASICs are facing severe challenges to meet simultaneously the requirements of high performance, low power consumption and high flexibility. Reconfigurable architecture is the ideal solution for intelligent computing since its programmability and dynamic re-configurability of architecture can adapt algorithm evolution and diversity of applications and greatly improves energy efficiency as well. Furthermore, how to improve the intelligent level of chip through training and learning after deployment is an important topic for people to think and explore. This presentation will start from the discussion of architecture innovation and followed by an exploration of basic ideas and approaches to chip intelligence.