Modeling and Analysis of the Switching Characteristics Difference for Paralleling SiC MOSFETs in Multichip Power Modules
编号:45 访问权限:公开 更新:2021-08-20 20:39:34 浏览:224次 张贴报告

报告开始:2021年08月27日 12:23(Asia/Shanghai)

报告时间:1min

所在会场:[P] Poster [P1] Poster 1

摘要
Modeling and analysis of the 1200V/600A silicon carbide (SiC) MOSFET power module with multichip in parallel is investigated. And the different switching characteristics of parallel chips are analyzed. The equivalent circuits of both the current commutation power loop and the gate loop are derived. The parasitic parameters are extracted by ANSYS Q3D. The parasitic inductance in the power loop is studied considering the mutual influence. The unbalanced layout of the gate loop would cause different switching characteristics of the chips in parallel. A mathematical model is built to analyze the relationship between gate resistor and stray inductance. The unbalanced current sharing during the transient could be eased by changing the gate resistor of each chip. The switching characteristics of the SiC MOSFET power module are measured in the double pulse tester under 400V/375A condition. The results validate the analysis of parasitic parameters.
关键词
SiC MOSFETs Modules,parallel laying,electromagnetic modeling,switching characteristics difference,ANSYS Q3D,parasitic inductance
报告人
Wenyu Li
Fudan University; China; Shanghai; 200433

稿件作者
Wenyu Li Fudan University; China; Shanghai; 200433
Saijun Mao Fudan University;Shanghai;China
Zhikun Wang Fudan University
Shuhao Yang Fudan University
Yujie Ding Fudan University; China; Shanghai
Keqiu Zeng Ltd.;Philips Healthcare (Suzhou) Co.
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重要日期
  • 会议日期

    08月25日

    2021

    08月27日

    2021

  • 04月21日 2021

    摘要截稿日期

  • 05月15日 2021

    摘要录用通知日期

  • 06月25日 2021

    终稿截稿日期

  • 08月24日 2021

    报告提交截止日期

  • 08月27日 2021

    注册截止日期

主办单位
IEEE
IEEE ELECTRONIC DEVICE SOCIETY
承办单位
Huazhong University of Science and Technology
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