This paper evaluates the influence of the interface traps distribution on the I-V (ID
) and C-V(CG
) characteristics of SiC MOSFET by TCAD simulations. Firstly, a TCAD model of commercial SiC MOSFET is established. Then, the effect of the interface traps distribution on the ID
characteristics of SiC MOSFET is studied in detail under different trap types and energy levels. Moreover, the correlation between ID
curves is analyzed. The acceptor traps close to EV
or the donor traps close to EC
cause the overall CG
curve to shift. Moreover, the influence of the interface traps on VTH
reflected in the CG
curve is consistent with that in ID
. The analysis in this paper is a support in the comprehension of interface traps distribution and the calibration of the TCAD model of SiC MOSFET.
Limited by the material properties and the processing technology, the interface state density of SiC/SiO2
is nearly two to three orders of magnitude higher than that of the Si/SiO2
, which causes a series of reliability issues of SiC MOSFET
. TCAD simulator is a consolidated tool for modeling power semiconductor devices. However, the complicated interface traps distribution that is difficult to obtain accurately leads to the inaccuracy of TCAD simulation. Therefore, it is very important to evaluate the interface traps by TCAD, which helps to establish an accurate TCAD model. Some researchers have analyzed the influence of interface traps distribution on the C-V characteristics by TCAD
. In literature 3, the effect of interface traps on VTH
hysteresis is studied
. However, the comprehensive analysis and the correlation between the influence of the interface traps on the I-V and C-V characteristics of SiC MOSFET remains to be explored.
In this paper, the TCAD model of a vertical 1200V SiC MOSFET is established first, as shown in Fig. 1. The model is calibrated under the condition that only the acceptor traps close to EC
are considered2. The ID
of the model are almost consistent with the product after calibrating. Secondly, the effect of type and energy level of the interface traps on the ID
, and μni
is studied in detail and the results are shown in Fig. 2-4. The VTH
increases whether the acceptor traps are close to EC
. However, it decreases with the donor traps located near the EC
and hardly affected by the donor traps located near the EV
. Moreover, it can be seen from the slope of the ID
curves that the μni
almost no change when the acceptor traps of the same density change from EC
. But the μni
increases for the donor traps with the same change. Then, Fig. 5-6 show the CG
curves extracted under the above conditions. The relationship between the influence of interface traps on C-V and I-V is revealed. In conclusion, the overall CG
curve shifts when there are acceptor traps near the EV
or donor traps near the EC
. This reflects the change in VTH
and flat band voltage VFB
, which is consistent with the results of ID
. A more accurate interface traps distribution and TCAD model of SiC MOSFET can be obtained under the combination of the analysis in this paper and the measurement of the I-V and C-V characteristics.
Afanasev V V, et al. Intrinsic SiC/SiO2
Interface States[J]. physica status solidi (a), 1997, 162(1):321-337.
Maresca L, et al. Influence of the SiC/SiO2
SiC MOSFET interface traps distribution on C-V measurements evaluated by TCAD simulations[J]. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2019, PP (99):1-1.
Cascino S, et al. Modeling of Threshold Voltage Hysteresis in SiC MOSFET Device[J]. Materials Science Forum, 2020, 1004:671-679.