Comparison Study of Parasitic Inductance, Capacitance and Thermal Resistance for Various SiC Packaging Structures
编号:109
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更新:2021-07-21 20:06:15 浏览:702次
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摘要
Parasitic parameters of packaging structure can affect the performance of silicon carbide (SiC) devices. Previous researches on SiC power modules lack a comprehensive comparison of different kinds of packaging structures. In this paper, six kinds of power modules are designed under the same standard, and their parasitic inductance, parasitic capacitance, and thermal resistance are extracted by finite element simulation for comparison. According to the result, the double-side-cooling structure has the smallest thermal resistance. The chip-on-chip structure shows extremely small parasitic inductance and capacitance, but this structure is complex thus the manufacturing technique and reliability should be considered. The full-shielding structure has extremely small parasitic capacitance and medial parasitic inductance, while its thermal resistance is larger than other structures. The rest three structures show mediocre performance.
关键词
SiC,packaging,thermal resistance,parasitic inductance,parasitic capacitance
稿件作者
Yue Xie
Huazhong University of Science and Technology
Yifan Zhang
Huazhong University of Science and Technology
Cai Chen
Huazhong University of Science and Technology
Yong Kang
Huazhong University of Science and Technology
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