As majority of articles pointed out in last year's symposium, there is a general consensus that the EUVL technology will definitely be applied for 7nm logic technology node in the coming years.
Steady progress has been reported on source stability, resist sensitivity, mask infrastructure, and so on. But further improvement for HVM productivity is still necessary, including:
Meeting productivity and availability targets for HVM, especially for EUV source
Mature mask defect inspection/review/repair infrastructure including pellicle technology
Meeting resist RLS targets (Resolution/LER/Sensitivity), including the use of post-processing techniques
EUV patterning: defectivity, variability, stack and pattern transfer
EUVL technology for the sub-7nm logic technology nodes is regarded as the most promising way for HVM production of devices. However, many obstacles remain to be overcome. Further EUV source power and resist RLS improvement, mask defectivity control with pellicles, etc. are necessary. More fundamental studies and innovative research are also viewed necessary to reach break-throughs. In addition, as earlier generations of optical lithography technologies have experienced, resolution enhancement technologies are bound to be necessary. Furthermore, total lithography process management including nano-size defects might be also required.
Over 500W EUV light sources including X-FEL
Mask: novel absorber types, mask architectures reducing mask 3D effects
EUV pellicle technologies (heating)
Novel EUV resists and auxiliary materials including fundamental studies
EUV extensions (high NA, double patterning, shorter wavelength, etc)
EUV integration in manufacturing (EI)
EUV tools, including sources and optics(ET)
EUV masks, mask inspection/repair and review (MA)
EUV pellicles, mask cleaning and thermal expansion (PE)
EUV resist materials/process and contamination (RE)
EUV patterning and process enhancement (EP)
EUV lithography extendibility (EE)
10月24日
2016
10月26日
2016
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