As we move to increase the power density of the package and system by ~10x or more, significant issues occur on and around the semiconductor chip, in/on the package, with the gate driver, in the bussing, and overall system isolation as higher voltages are pushed into smaller spaces. Topics to be covered include: Wide bandgap devices and modules Packaging (device through system) Gate drivers Capacitors and Passives Thermal Management Modeling and CAD (General) Modeling and CAD for Reliability High Temperature Modules/Packaging Dielectrics (several sessions ranging the topics above).