We invite original paper submissions on related to but not limited to the following:

• Processor, memory, interconnect, and storage architectures.

• Hardware, software, and hybrid techniques for improving system performance, energy-efficiency, cost, complexity, predictability, quality of service, reliability, dependability, security, scalability, programmer productivity, etc.

• Processor, memory, storage, interconnect designs

• Architectures for instruction-level, thread-level, and memory-level parallelism: superscalar, VLIW, data-parallel, multithreaded, multicore, manycore, etc.

• Compiler and microarchitectural techniques for parallelism (ILP, TLP, MLP)

• Low-power, high-performance, and cost/complexity-efficient architectures

• Architectures for emerging platforms, including smartphones, tablets, cloud/datacenter, etc.

• Architectures and compilers for embedded processors, DSPs, GPUs, ASIPs (network processors, multimedia, wireless, etc.)

• Advanced software/hardware speculation and prediction schemes

• Microarchitecture techniques to better support system software, programming languages, programmability, and compilation

• Microarchitecture modeling and simulation methodology

• Insightful experimental and comparative evaluation and analysis of existing microarchitectures, hardware/software mechanisms and workloads