System-Level Modeling and Design Methodology:

• HW/SW co-design, co-simulation and co-verification

• System-level design exploration, synthesis and optimization

• Model- and component-based embedded system/software design

• System-level formal verification

• System-level modeling, simulation and validationtools/methodology

Embedded System Architecture and Design:

• Many- and multi-core SoC architecture

• Reconfigurable and self-adaptive SoC architecture

• IP/platform-based SoC design

• Domain-specific architecture

• Dependable architecture

• On-chip memory architecture

• Cyber physical system

• Storage system architecture

• Internet of things

On-chip Communication and Networks-on-Chip:

• On-chip communication network

• Networks-on-chip

• Interface and I/O design

• Optical and RF on-chip communication

Embedded Software:

• Kernel, middleware and virtual machine

• Compiler and toolchain

• Real-time system

• Resource allocation for heterogeneous computing platform

• Storage software and application

• Human-computer interface

• System verification and analysis

Device/Circuit-Level Modeling, Simulation and Verification:

• Device/circuit/interconnect modeling and analysis

• Device/circuit-level simulation tool and methodology

• RTL and gate-leveling modeling, simulation and verification

• Circuit-level formal verification

Analog, RF and Mixed Signal:

• Analog/mixed-signal/RF synthesis

• Analog layout, verification and simulation techniques

• Noise analysis

• High-frequency electromagnetic simulation of circuit

• Mixed-signal design consideration

• Power-aware analog circuit/system design

• Analog/mixed-signal modeling and simulation techniques

• CAD for memory circuits

Power Analysis, Low Power Design, and Thermal Management:

• Power modeling, analysis and simulation

• Low-power design and methodology

• Thermal aware design

• Architectural low-power design technique

• Energy harvesting and battery management

Logic/High-Level Synthesis and Optimization:

• High-level synthesis tool and methodology

• Combinational, sequential and asynchronous logic synthesis

• Logic synthesis and physical design technique for FPGA

• Technology mapping

Physical Design:

• Floorplanning, partitioning and placement

• Interconnect planning and synthesis

• Placement and routing optimization

• Clock network synthesis

• Post layout and post-silicon optimization

• Package/PCB/3D-IC routing

Design for Manufacturability and Reliability:

• Reticle enhancement, lithography-related design and optimization

• Resilience under manufacturing variation

• Design for manufacturability, yield, and defect tolerance

• Reliability, aging and soft error analysis

• Design for reliability, aging, and robustness

Timing and Signal/Power Integrity:

• Deterministic/statistical timing and performance analysis and optimization

• Power/ground and package modeling, analysis and optimization

• Signal/power integrity, EM modeling and analysis

• Extraction, TSV and package modeling

• 2D/3D on-chip power delivery network analysis and optimization

Test and Design for Testability:

• ATPG, BIST and DFT

• Fault modeling and simulation

• System test and 3D IC test

• Online test and fault tolerance

• Memory test and repair

• Analog and mixed-signal/RF test

Security and Fault-Tolerant System:

• Security modeling and analysis

• Architecture, tool and methodology for secure hardware

• Design for security and security primitive

• Cross-layer security

• Fault analysis, detect and tolerance

Emerging Technology:

• New transistor/device and process technology: spintronic,phase-change, single-electron etc.

• CAD for nanotechnology, MEMS, 3D IC, quantum computing etc.

Emerging Application:

• Biomedical application

• Big data application

• Advanced multimedia application

• Energy-storage/smart-grid/smart-building design and optimization

• Datacenter optimization

• Automotive system design and optimization

• Electromobility