活动简介

We are pleased to announce the upcoming 2nd international conference “Devices for Integarted Circuits (DevIC 2017)”, to be held at Kalyani Government Engineering College from March 23-24, 2017, organized by IEEE KGEC Student Branch Chapter in association with Department of ECE, KGEC, technically co-sponsored by IEEE EDS Kolkata Chapter. There will be keynote lectures/talks, tutorials, and oral presentations  by eminent researchers. We solicit original research and technical papers not published elsewhere.

DevIC 2017 aims to bring together leading scientists,researchers, engineers, and scholar students to exchange and share their experiences, new ideas, and research results about all aspects of device technology & modeling to discuss the practical challenges encountered and the solutions adopted. The conference also will provide an opportunity to local, regional and international industries-service providers to present their technologies, products and services. Moreover, we want to continue our conference in the subsequent years also, to build a community against the conference.

The aim and objective of DevIC 2017 is to provide an annual forum for the presentation and discussion of recent advances in solid-state devices, circuits and systems. The increasing level of integration for system-on-chip design made available by advances in silicon technology is more than ever before calling for a deeper interaction among technologists, device experts, IC designers, and system designers.

More details on the invited talks and special sessions will be announced as they become available. For additional inquiries please contact the conference chairs.

We hope to see you at the Kalyani Govt. Engg. Colleg on 23-24 March, 2017!

征稿信息

重要日期

2016-12-01
摘要截稿日期
2016-12-01
初稿截稿日期
2017-03-10
初稿录用日期
2017-03-20
终稿截稿日期

征稿范围

Papers are solicited across the general field of electronic devices. Topics of interest include, but are not limited to:

  • CMOS Processes, Devices and Integration:
    CMOS scaling; Silicon Nanowires;Simulation of Dual gate, Vertical Channel and Cylindrical Gate MOSFET/OTFTs;Advanced Memory Devices; Novel MOS device architectures;

  • Emerging Non-CMOS Devices & Technologies:
    Emerging Electronic Device Materials (graphene, MoS2, etc.); Magnetic Devices;Novel MOS device architectures; III-V, and 2D Electronic Devices; New high-mobility channels (strained Si, Ge, SiGe);Nano-electro-mechanical Devices and Systems;High frequency digital and analog devices including THz; Novel non-CMOS materials, processes and devices, (nanotubes, nanowires and nanoparticles, including carbon, graphene, metal oxides, …) for electronic, optoelectronic, sensor & actuator applications;

  • Device Modelling & Simulation: Modeling and simulation of nanomaterials, structures, and devices; Modelling of Solid State Devices;Modelling and Simulation of FinFETs, MOSFETs, CMOS, Tunnel-FETs; Modelling and Simulation p and n-Channel Organic Thin Film Transistors (OTFTs);Modelling and Simulation p and n-Polymer Thin Film Transistors (PTFTs);Modelling and Simulation Thin Film Transistors (TFTs);Modelling and Simulation Organic Novel Device Structures; Physics and Modeling of Submicron and Nanoscale Microelectronic and Optoelectronic Devices Including Processing, Measurement, and Performance evaluation; Analytical Models for Organic Devices;Modelling and Simulation of Organic Light Emitting Diodes (OLEDs); Modelling and Simulation of Organic Solar Cells;Mathematical Models of Novel Electronic Device Structures

  • Device Characterization, Reliability & Yield: Front-end and back-end manufacturing processes; 3D integration and wafer-level packaging; Reliability of materials, processes and devices; Advanced interconnects; ESD, latch-up, soft errors, noise and mismatch behavior, hot carrier effects, bias temperature instabilities, and EMI; Defect monitoring and control; Metrology; Optimization of Device Performance Parameters;Terahertz Devices;Wide-bandgap Devices;Semiconductor Process Technologies;Nanostructures and devices for biomedical applications;Photovoltaics and Sensors System Design; 3D Systems and Packaging Technologies; Nanostructures for future generation solar cells;

  • Devices with New material systems:
    Graphene and carbon nanotubes based materials and devices;Biological Devices; Organic/Polymer Electronics; Novel Optoelectronic Devices

  • Devices for Low power applications:
    Energy Scavenging Devices; Materials and devices for energy and environmental applications;

  • Low dimensional devices:
    Low dimensional Semiconductors: Growth & Applications;Quantum Devices;Quantum effect in Nanoscale Electronic and Optoelectronic Devices;Spin-based Devices;Computational Modeling at the Nanoscale;Fundamental and applications of nanotubes, nanowires, quantum dots and other low dimensional materials;

  • Design and Simulation of Circuits with nanoscale devices:
    Modelling and Simulation of Novel Circuits;Modelling of Circuit Networks, Analogue and Digital Circuits; Mixed Mode Circuit Simulations; Applications of Numerical Methods to the Modeling and Simulation of Devices and Processes; Modelling and Simulations Device Circuit Co-design

  • MEMS, Sensors & Display Technologies:Design, fabrication, modeling, reliability, packaging and smart systems integration of actuators (discrete SoC, SiP, or heterogenous 3D integration); MEMS, NEMS, optical, chemical or biological sensors; Display technologies; High-speed imagers; TFTs; Organic and flexible substrate electronics.

  • Advanced & Emerging Memories: Novel memory cell concepts and architectures; Embedded and stand-alone memories; DRAM, FeRAM, MRAM, PCRAM, CBRAM, Flash, SONOS, nanocrystal memories; single and few electron memories; 3D systems integration; Organic memories; NEMS-based devices.

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重要日期
  • 会议日期

    03月23日

    2017

    03月24日

    2017

  • 12月01日 2016

    摘要截稿日期

  • 12月01日 2016

    初稿截稿日期

  • 03月10日 2017

    初稿录用通知日期

  • 03月20日 2017

    终稿截稿日期

  • 03月24日 2017

    注册截止日期

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