Welcome to the new IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (IEEE S3S). In 2013, an exciting new event named IEEE S3S will take place in Monterey, CA. This industry-wide event is founded upon the co-location of two IEEE conferences which have been at the leading edge of CMOS technology: The IEEE International SOI Conference and the IEEE Subthreshold Microelectronics Conference. An additional third track on 3D Integration is also being included which will emphasize invited talks from world-renowned experts in 3D technology as well as contributed talks from leading research groups and industry. The IEEE S3S organizers are pleased to welcome you to this new event, which allows attendees access to essentially three conferences with one registration fee. This year our conference will host parallel tracks for the SOI and Subthreshold Microelectronics. In addition, we will feature 3D Integration by having a joint technical session exclusively dedicated to this topic as well as a short course detailing the basics and latest trends in this exciting field. While we will be highlighting these new topics we will also continue to be the world’s premier conference to present and discuss state of the art SOI technical papers. This new unified conference will help us to improve our efficiency and establish this conference as a world class International venue to present and learn about the most up to date trends in CMOS and post-CMOS Scaling. The conference committee hopes you will enjoy this new conference that will give you more opportunities to learn and gain insight into the different contributions to the low-power SOC eco-system. The technical sessions will be preceded by two one-day Tutorial Short Courses highlighting exciting opportunities and their implication in CMOS scaling. There will be two parallel courses covering FDSOI Design, and 3D Integration and Design.