[1] TECHNOLOGY & MODEL

 Chair: Xingsheng Wang

 Co-Chair: Lining Zhang

• 1.1 Device Compact Modeling

• 1.2 Process Design Kit

• 1.3 Semiconductor Process & Device Simulation

• 1.4 Cell Library Design, Characterization and Verification

[2] ANALOG CIRCUIT

 Chair: Fan Yang (FDU)

 Co-Chair: Hao Yu

• 2.1 Schematic & Layout Design

• 2.2 Circuit Simulation

• 2.3 On-chip & Packaging Electromagnetic Field Simulation

• 2.4 Radio-Frequency & Photoelectric Compound Circuit Simulation

[3] DIGITAL DESIGN & VERIFICATION

 Chair: Zhufei Chu

 Co-Chair: Yong Fu

• 3.1 Digital Simulation / Emulation

• 3.2 High-Level Synthesis

• 3.3 Logic Synthesis

• 3.4 Formal Verification

• 3.5 Constructing Hardware in Scala Embedded Language

[4] PHYSICAL IMPLEMENTATION

 Chair: Hailong Yao

 Co-Chair: Peng Cao

• 4.1 Design-For-Test, Design-For-Reliability, Design-For-Manufacturability

• 4.2 Placement & Routing

• 4.3 Parasitic Extraction

• 4.4 Timing Analysis

• 4.5 Physical Verification

• 4.6 Electromigration & IR drop

[5] WAFER MANUFACTURING

 Chair: Lan Chen

 Co-Chair: Yayi Wei

• 5.1 Computational Lithography

• 5.2 Masking Manufacturing

• 5.3 Yield & Defect Analysis

• 5.4 Process Modeling and Emulation

• 5.5 Metrology and Silicon Data Processing

• 5.6 APC (Automatic Process Control) Technology

[6] PACKAGING & MULTI-PHYSICS

 Chair: Hongliang Lu

 Co-Chair: Min Tang

• 6.1 Packaging Design

• 6.2 Chip Level Thermal Simulation

• 6.3 Packaging Stress Analysis

• 6.4 Multi-Physics Simulation

[7] EMERGING TECHNOLOGIES

 Chair: Bei Yu

 Co-Chair: Li Jiang

• 7.1 Artificial Intelligence for EDA

• 7.2 Cloud / Parallel Computing for EDA

• 7.3 Heterogeneous Computing for EDA

[8] MISCELLANEOUS

 Chairs: Xiaohui Tan, Huawei Li, Longxing Shi

 Co-Chairs: Duanduan Jian, Guojie Luo, Zhixiong Di

• 8.1 Open Source EDA

• 8.2 EDA Database

• 8.3 EDA Standardization