This interdisciplinary workshop is organized to explore the scientific issues, challenges, and opportunities for supercomputing beyond the scaling limits of Moore’s Law, with the ultimate goal of keeping supercomputing at the forefront of computing technologies beyond the physical and conceptual limits of current systems. Moore’s Law—the doubling the number of transistors in a chip every two years—has so far contributed to every aspect of supercomputing system architectures, including GPU and many-core accelerators, large on-chip caches, integrated special purpose hardware, and increasing memory capacities. However, it is now well accepted that current approaches will reach their limits in next decade due to the confluence of several limitations including both fundamental physics and economics.

Although device and manufacturing technologies continue to make progress, most experts predict that CMOS transistor shrinking may stop at around 2025 to 2030 due to these limits. Nevertheless, continuing the progress of supercomputing beyond the scaling limits of Moore’s Law is likely to require a comprehensive re-thinking of technologies, ranging from innovative materials and devices, circuits, system architectures, programming systems, system software, and applications. In this regard, the goal of the workshop is to explore the technological directions of supercomputing to prepare for this “Post Moore’s Law” era by fostering interdisciplinary dialog across the spectrum of stakeholders: applications, algorithms, software, and hardware. Experts from academia, government, and industry in the fields of computational science, mathematics, engineering, and computer science will participate in the workshop as invited speakers, position papers, and panelists.