Finite control set MPC is widely used in power electronics converters as it eliminates the need for a modulator, directly handling switching actions. However, this results in higher switching frequencies, often requiring a single-sample horizon to maintain computational feasibility at the cost of dynamic performance. To address the computational burden of FCS-MPC, various techniques have been proposed. This paper builds on two established approaches: the subset of adjacent vectors (SAV) and the sphere decoding algorithm (SDA), which optimizes computations by reducing the search space. A novel technique, Preselected Adjacent Vectors with Sphere Decoding Algorithm (PAV-SDA), is introduced. The proposed approach is implemented in a three-phase two-level voltage source inverter (3P-2L-VSI) and evaluated through simulations. 
The findings demonstrate that PAV-SDA achieves a balance between computational efficiency and performance. For longer horizons, PAV-SDA significantly reduces computational effort compared to standard FCS-MPC while maintaining THD and MSE values. 

power electronics control,subset of adjacent vectors,computational burden reduction,search space reduction