A Gating Path Optimization Method for Press-Pack IGBT
编号:94 访问权限:仅限参会人 更新:2020-10-29 11:22:54 浏览:261次 口头报告

报告开始:2020年11月02日 15:30(Asia/Shanghai)

报告时间:15min

所在会场:[B] Power Electronics Technology and Application [B1] Session 3 and Session 8

视频 无权播放 演示文件

提示:该报告下的文件权限为仅限参会人,您尚未登录,暂时无法查看。

摘要
IGBT devices are widely used in high-voltage and high-power applications. IGBT module has two kinds of packaging structure, which are welded IGBT and press-pack IGBT (PP-IGBT). Since a PP-IGBT module can integrate more chips and diode chips to obtain a large current capacity, it has been widely used in high power applications. However, due to the individual differences of chips in parallel, the stray parameters of the gating loops may be different, which leads to the imbalance of current and thermal problem of PP-IGBT, and eventually lead to the failure or even damage of the device. In this paper, some key factors resulting inconsistency of stray parameters in gating loops are reviewed, and a methodology to make the gating loops more consistent are proposed. The feasibility of the methodology is also verified by ANSYS software simulation.
关键词
Driving loop layout, PP-IGBT, Stray parameter.
报告人
Huaidong Min
Huazhong University of Science and Technology

稿件作者
Huaidong Min Huazhong University of Science and Technology
发表评论
验证码 看不清楚,更换一张
全部评论
重要日期
  • 会议日期

    11月02日

    2020

    11月04日

    2020

  • 10月27日 2020

    初稿截稿日期

  • 11月03日 2020

    报告提交截止日期

  • 11月04日 2020

    注册截止日期

  • 11月17日 2020

    终稿截稿日期

主办单位
IEEE IAS Student Chapter of Huazhong University of Science and Technology (HUST)
承办单位
Huazhong University of Science and Technology
联系方式
移动端
在手机上打开
小程序
打开微信小程序
客服
扫码或点此咨询